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CBM 8296
========
What follows was typed in by yours truely from a photocopy of an
"original". I hope I have reproduced the contents faithfully, even
though this is a bit hard with some tables. Most text is in typewriter
font, right-aligned, but some is in a proportional font and I had to
rearrange some of that text.
I left the small indications of German origin.
Text between [square brackets] is mine.
-Olaf
This document has been slightly html-ized and enriched with
links to scanned images of the tables and pinouts by me.
No further changes have been done.
The listings of the add-on programs mentioned have been scanned,
OCRd and post-edited by me. I tried to make the code as correct
as possible, the line numbers and hex codes do still have quite
some errors though.
Andre
Thanks to William M. Levak I finally got the last page of the
8296 supplement, which describes the !E and !Q commands, but also has
some more comments.
Andre
CBM 8296
SUPPLEMENT to the 8032 Manual Seite
1. Introduction 1
2. Memory system 1
2.1 Memory mapping 1
2.2 Control register 3
2.3 Modification of memory system 4
2.4 User Jumper 5
3. Video-RAM 6
4. Hardware expansion via J4, J9 7
4.1 Memory expansion bus J4, J9 7
4.2 Power supply for hardware expansion 7
5. Programming the expansion memory bank 8
5.1 I/O handling 8
5.2 Interrupt processing 9
5.3 Interrupt Handler Program 9
Annex
A Memory map 12
B.1 Connectors 8296 13
B.2 Connectors, modification as compared with 8032 17
C Software addendum 18
1. Introduction
The CBM 8296 is an expanded version of the CBM 8032, and is fully
software compatible with the CBM 8096. Where the hardware is con-
cerned, there are some amendments and additional options, since
the CBM 8296 has a total of 128 k RAM. The plug arrangements are
also slightly different.
2. Memory system
The CBM 8296 has two RAM banks, each with 64 k bytes, designated
here the main memory and the expansion memory.
The main memory is activated on switch-on, and the computer reacts
like a standard CBM 8032.
2.1 Memory Mapping
Expansion memory can be mapped into main memory addresses $8000
through $FFFF. See Figure 2-1. Only two of the 16k expansion
blocks can reside in main memory at one time. This provides an
additional 32k bytes of memory to the user.
Selection of the expansion blocks is by bits 2 and 3 of the
expansion memory control register. Each 16k block has a 16k
alternate that can be selected by bits 2 and 3 of the control
register.
Main memory addresses $8000 through $BFFF can only be mapped by
expansion blocks 0 or 1. Main memory addresses $C000 through $FFFF
can only be mapped by expansion blocks 2 or 3.
- 1 -
[scanned image]
0 +----------------+ 0000
| |
| |
| |
| |
| |
| |
| |
| |
16K +----------------+ 4000
| |
| |
| |
| |
| |
| |
| |
| |
32K +----------------+ 8000 ............. +--------------+ +--------------+
| Screen | | | | |
+----------------+ 9000 | | | |
| | ADDRESSES | BLOCK 0 | | BLOCK 1 |
| | 8000 TO BFFF | 16K | | 16K |
| | (32K TO 48K) | | | |
| | | | | |
| | BFFF | | | |
48K +----------------+ C000 ............. +--------------+ +--------------+
| | | | | |
+----------------+ | | | |
| | ADDRESSES | BLOCK 2 | | BLOCK 3 |
58K +----------------+ C000 TO FFFF | 16K | | 16K |
| | E800 (48K TO 64K) | | | |
60K |......I/O.......| F000 | | | |
| | FFFF | | | |
64K +----------------+ +--------------+ +--------------+
Figure 2-1. Expansion memory mapping
- 2 -
2.2 Control Register
Control of the expansion memory is through a memory control
register located at address $FFF0. The memory control
register provides selection of 16k-byte blocks, write
protection, enabling the expansion memory, I/O peek through
and screen peek through. Because the memory control register
is write only, a copy of the register should be kept in the
lower 32k of main memory.
Figure 2-2 depicts the functions of the memory control register.
The paragraphs following it describe these functions in detail.
Address $FFF0
---------------------------------------------------
7 6 5 4 3 2 1 0
---------------------------------------------------
| | | | | |
| | | | | |
Enable --+ | | | | +-- Write Protect
| | | | $8000 - $BFFF
| | | |
I/O peek through+ | | Select +--------- Write Protect
$E800-$EFFF | | 16K $C000 - $FFFF
| | Block: 0 0: 2 and 0
Screen peek through ---+ | 0 1: 2 and 1
$8000-$8FFF | 1 0: 3 and 0
| 1 1: 3 and 1
Reserved ---------------------+
Figure 2-2.
Expansion Memory
Control Register
Control Register Bit 7 - When equal to 1, enables the expansion memory.
When bit 7 equal to 0, expansion memory is disabled. Bit 7 defaults to 0
on power up.
Control Register Bit 6 - When equal to 1, I/O peek through is enabled.
Control Register Bit 5 - When equal to 1, screen peek through is enabled.
Control Register Bit 4 - Reserved.
Control Register Bit 3 - When equal to 1, block 3 (16k-byte) is selected.
When equal to 0, block 2 (16k-byte) is selected.
Control Register Bit 2 - When equal to 1, block 1 (16k-byte) is selected.
When equal to 0, block 0 (16k-byte) is selected.
Control Register Bit 1 - When equal to 1, addresses $C000 through $FFFF
on the /Expansion Memory Board only/ are write protected.
I/O is not write protected if I/O peek through is enabled.
When equal to 0, the addresses are not write protected.
Control Register Bit 0 - When equal to 1, addresses $8000 through $BFFF
on the /Expansion Memory Board only/ are write protected.
The screen is not write protected if screen peek through is enabled.
When equal to 0, the addresses are not write protected.
- 3 -
2.3. Modifications to the main memory system
By contrast with the CBM 8032, each address in the 64 k main
memory is covered by RAM. A write command into any address (apart
from I/O) causes the corresponding RAM address to be written at,
and a read command reads from RAM between $0000 and $8FFF; above
$9000 from the empty [EP]ROM sockets, from the ROM or from the I/O
devices.
RAM $0000 - $FFFF
Empty socket $9000 - $AFFF
ROM $B000 - $FFFF. except $E8XX
I/O $E800 - $E8FF
The memory system for CPU read accesses can be modified by means of
the signals /RAM SEL 9, /RAM SEL A, and /RAM ON (J4, Pins 12, 13, 14)
in accordance with the following table:
[The first line represents the normal config. In my machine I have
jumpered J4 (the expansion bus) pins 12 and 13 to ground which gives me
8K of additional RAM which is not cleared on reset. Ground pins are
available in the adjecent row.]
[scanned image]
[/NO ROM = 1; see page 12 for more cases]
+-----+--------+------------+-------------------------------------------------+
| |Control | | |
| |Register| | main memory $8000 - $FFFF [UB1-UB8] |
| | | | [$0000 - $7FFF is always RAM from UB1-UB8] |
| |$FFF0 | | |
+-----+--------+------------+-------------------------------------------------+
| | I/O |___ ___ ___ | E000 |
| ___ | peek|RAM RAM RAM | E800 F000 -E7FF B000 A000 9000 8000 |
| NO_ | thr.|___ ___ ___ | E900 |
| ROM |CR7 CR6 |ON S.9 S.A |-E8FF -FFFF -EFFF -DFFF -AFFF -9FFF -8FFF |
+-----+--------+------------+-------------------------------------------------+
| | | | |
| 1 | 0 X | 1 1 1 | I/O Kernal Editor BASIC EPROM EPROM SCREEN |
| | | | |
| 1 | 0 X | 1 1 0 | I/O Kernal Editor BASIC RAM EPROM SCREEN |
| | | | +-----+ |
| 1 | 0 X | 1 0 1 | I/O Kernal Editor BASIC EPROM RAM SCREEN |
| | | | +-----+ |
| 1 | 0 X | 1 0 0 | I/O Kernal Editor BASIC RAM RAM SCREEN |
| | | | +-----+ |
| 1 | 0 X | 0 1 1 | I/O Kernal Editor RAM RAM RAM SCREEN |
| | | | +------+ |
| 1 | 0 X | 0 0 1 | I/O Kernal RAM RAM RAM RAM SCREEN |
| | | | +------+ |
| 1 | 0 1 | 0 X 0 | I/O RAM RAM RAM RAM RAM SCREEN |
| | | |+----+ |
| 1 | 0 0 | 0 X 0 | RAM RAM RAM RAM RAM RAM SCREEN |
| | | | |
+-----+--------+------------+-------------------------------------------------+
SCREEN: 2000 bytes for screen memory, and 2096 bytes of available RAM.
- 4 -
2.4. User Jumper
These three signals can be either fixed or programmable via
user jumpers. Bits 0, 1 and 2 are used for control under program
control.
[In my machine these jumpers are not true jumpers. You must solder two
very tiny locations on the motherboard together to close the jumpers.
Also these locations are rather far apart in the midst of various other
tiny traces. I opted to use J4 instead which has JU1 and JU2 effectively
accessible.]
Jumper Description of function
_________
JU1 RAM SEL A = LOW
_________
JU2 RAM SEL 9 = LOW
_________
JU3 RAM SEL A to Port A0
_________
JU4 RAM SEL 9 to Port A1
______
JU5 RAM ON to Port A2
To use the user jumpers JU3 to JU5, Pins 0, 1 and 2 of the user
port must be programmed to output.
DR = 59459 ($E843)
DA = 59471 ($E84F)
POKE DR, PEEK (DR) OR 7
The desired combination of bits (0 ... 7) can then be poked into
the port register DA.
N.B. When using JU3, JU4 and JU5, make sure that the user port is
not written at accidentally. This can happen for instance in
a number of text processing programs, which emulate a
Centronics interface via the user port.
______
The signal RAM ON must be high at the start, as it is not
otherwise possible to complete the POWER ON routine in the ROM.
- 5 -
3. Video RAM
As previously, the video RAM is at $8000 - $87CF. With the CBM
8296 however, the CRT controller has access to the full range of
addresses from $8000 - $9FFF. This produces 3 further screen
pages, which can be used for program menues, help lists and the
like. The four screen pages can be written at any time. The
operating system uses the first page only.
Page turning on display is achieved by altering the VIDEO RAM
start address in the CRT controller (reg. 12):
POKE 59520, 12
POKE 59521, x
wherein x=0 for page 1 ($8000-$87CF, switch on figure)
x=4 for page 2 ($8800-$8FCF)
x=8 for page 3 ($9000-$97CF)
x=12 for page 4 ($9800-$9FCF)
Activating the switchover text-modus and graphic-modus brings the
screen page 1 back each time to display.
To use pages 3 and 4, the IC socket UE10 [$9XXX] must be free, or the
/RAM SEL 9 signal set at LOW. Otherwise the ROM in the UE10 trans-
mits data at the same time.
For CPU read access to screen pages 3 and 4, /RAM SEL 9 must again
be set at LOW (see 2.).
Other parameters of the screen controller should be modified by
comparison with the standard operating conditions (text or
graphic) only with extreme caution. The dynamic RAM memories used
require a cyclical refresh, which is produced by the CRT
controller. To be sure of the refresh, the CRT controller must
give at least 256 symbols in an interval of 4 ms.
- 6 -
4. Hardware expansions via J4, J9
4.1. Memory expansion bus J4, J9
Hardware expansions can be linked via the memory expansion bus
(J4, J9).
The data buffer for the expansion bus is, as with the CBM 8032,
always switched in as an output. If the CPU is to read from the
expansion bus, close user jumper JU6 for the range $A000 to $AFFF,
and user jumper JU7 for the range $9000 to $9FFF. The ROM sockets
UE10 or UE9 must of course than remain free. The expansion bus
cannot be read in the range $8000 to $8FFF.
[ There are also JU8 (connected through a resistor) and JU9... ]
A further way of gaining access to the expansion bus is provided
by the line /SEL EXP (J4, Pin 15). Low-level on this line switches
the data bus buffer of the expansion bus to input on a read
command, independently of the address on the CPU. Care should
therefore be taken to avoid bus conflicts when using SEL EXP. Make
sure that only one data source (RAM, ROM I/O or expansion bus) is
activated.
_______
The control like SEL EXP must be switched with a collector gate.
Jumpers JU6 and JU7 may also be closed.
_________ _________
If the RAM SEL 9 or RAM SEL A line is activated, the RAM is
switched in to this address range, and the expansion bus is
switched out.
4.2. Power supply for hardware expansions.
Connectors J10 and J11 are available for this purpose. As
previously, ground and +9V DC unregulated are available at J11
(0.8 A max.). J10 is modified as compared with the CBM 8032, and
now connected to 8V AC (1 A max.) and ground. Not more than 1A may
be taken out via J10 and J11.
- 7 -
5. Programming the expansion memory bank
The user may choose to write his own programs to operate the
expansion memory. A sample program is included in this chapter.
5.1 I/O Handling
I/O in the CBM 8032 consists of the following five devices:
1. A 6520 PIA at $E810
2. A 6520 PIA at $E820
3. A 6522 VIA at $E840
4. A CRT controller at $E880
5. Screen memory at $8000 through $87FF
These five I/O devices may be accessed in two ways. The first way is to
simply switch out the expansion memory and restore main memory. This
may be already accomplished by the memory manager software when a CBM
I/O subroutine is called.
The second way (necessary when a RAM-loaded application program accesses
I/O) uses the I/O peek through feature. Bit 6 of the control register
enables I/O peek through.
+----------------------------------------------------------------+
| NOTE |
| When using the I/O peek through, ensure that the currently |
| running subroutine does not reside over the top of the |
| peek through. |
+----------------------------------------------------------------+
Accessing screen memory is accomplished in the same way as accessing
the other I/O devices. When accessed, screen memory is seen as 25 lines
of 80 columns. The data is stored row-wise as sequential bytes.
The CRT display circuitry cannot directly display out of the expansion
RAM. A suggested memory manager function is to page whole screen-fulls
of data out of the expansion RAM.
- 8 -
5.2 Interrupt Processing
The 6502 microprocessor is designed for a simple architecture in which
the lower 32k of the address space is RAM and the upper 32k is ROM. This
allows the microprocessor to fetch the starting address of the first
instruction out of ROM upon reset. The result is that three hardware
vectors are stored in addresses $FFFA - $FFFF.
The memory manager must accomplish the following functions.
1. Ensure that there is a valid address at each ROM address in the two
16k expansion blocks that are active. The only exception is if
interrupts are disabled by a SEI instruction executed before bit 7 is
set to a 1.
2. To avoid being interrupted while changing a vector, execute a SEI.
3. The ROM interrupt vectors in the CBM point to routines in ROM which
are not accessible when the expansion memory is selected. For that
reason, the memory manager should a) set the vectors to point at a
routine that switches to main memory mode, b) call the interrupt service
routine, and c) restore the expansion memory mode.
5.3 Interrupt Handler Program
The following sample program (Refer to Table 5-1) handles interrupt and
passes control to the ROM routines for processing. The global variable
MEMMAP contains the current contents of the control register. The user
program must first call the INIT routine to load the 6502 interrupt vectors
into the expansion RAM. After that, interrupts are pre-processed by the
subroutines NMI and IRQ. Interrupts are excited by RTIP.
- 9 -
Table 5-1. Interrupt Handler Program
; INITIALIZE INTERRUPT PROCESS
;
; ASSUME MEMMAP SETUP
;
INIT SEI
LDA MEMMAP
STA $FFF0
;
; INIT USER IRQ VECTOR
;
LDA #<IRQ
STA $FFFE
LDA #>IRQ
STA $FFFF
; INIT USER NMI VECTOR
;
LDA #<NMI
STA $FFFA
LDA #>NMI STA $FFFB
CLI
;
RTS
; PROCESS IRQ
;
IRQ STA TMPA PRESERVE .A
;
PLA
PHA
STA TMPPS
;
LDA #%00000000
STA $FFF0
;
; PUSH RETURN FROM INTERRUPT ADDRESS
;
LDA #>RTIP
PHA
LDA #<RTIP
PHA
;
LDA TMPPS
PHA ; PUSH DUMMY STATUS
;
LDA TMPA ; RESTORE .A
;
; GO TO ROM IRQ SERVICE
;
JMP ($FFFE)
- 10 -
Table 5-1. Interrupt Handler Program (Continued)
; PROCESS NMI
;
; PROCESS NMI
;
NMI STA TMPA ; PRESERVE .A
;
PLA
PHA
STA TMPPS
;
;
LDA #%00000000
STA $FFF0
;
; PUSH RETURN FROM INTERRUPT ADDRESS
;
LDA #>RTIP
PHA
LDA #<RTIP
PHA
;
LDA TMPPS
PHA PUSH DUMMY STATUS
;
LDA TMPA ; RESTORE .A
;
; GO TO ROM IRQ SERVICE
;
JMP ($FFFA)
;
; RETURN FROM INTERRUPT PROCESS
;
RTIP PHA
;
; MAP BACK TO ORIGINAL RAM
;
LDA MEMMAP
STA $FFF0
;
; RESTORE OLD .A
;
PLA
;
; BACK TO USER
;
RTI
.END
.LIB MONITOR
- 11 -
A Memory Map
[ I completely rearranged this table. It was printed sideways on the page
and repeated earlier info. This would not fit so I omitted the duplicate,
presenting only the new mappings in the same form as earlier. ]
[scanned image]
+-----+--------+------------+-------------------------------------------------+
| |Control | | |
| |Register| | main memory $8000 - $FFFF [UB1-UB8] |
| | | | [$0000 - $7FFF is always RAM from UB1-UB8] |
| |$FFF0 | | |
+-----+--------+------------+-------------------------------------------------+
| | I/O |___ ___ ___ | E000 |
| ___ | peek|RAM RAM RAM | E800 F000 -E7FF B000 A000 9000 8000 |
| NO_ | thr.|___ ___ ___ | E900 |
| ROM |CR7 CR6 |ON S.9 S.A |-E8FF -FFFF -EFFF -DFFF -AFFF -9FFF -8FFF |
+-----+--------+------------+-------------------------------------------------+
| | | | |
| 0 | 0 1 | X X X | I/O Free Free Free Free Free SCREEN |
| | | | |
| 0 | 0 0 | X X X | RAM Free Free Free Free Free SCREEN |
| | | | |
| X | 1 X | X X X | 2 x 32 K zus\"atl. RAM from 64K in UA1-UA8. |
| | | | |
+-----+--------+------------+-------------------------------------------------+
No Rom = 0: marked "for diagnostic".
SCREEN: 2000 bytes for screen memory, and 2096 bytes of available RAM.
- 12 -
B.1 connectors 8296
IEEE USER - PORT
==== ===========
Arrangement of pins plug J1/J12 Arrangement of pins plug J2
+-----+-------------+-----+--------+ +-----+-------------+-----+--------+
| PIN | SIGNAL | PIN | SIGNAL | | PIN | SIGNAL | PIN | SIGNAL |
+-----+-------------+-----+--------+ +-----+-------------+-----+--------+
| 1 | DIO 1 | A | DIO 5 | | 1 | GND | A | GND |
| 2 | DIO 2 | B | DIO 6 | | 2 | VIDEO | B | CA1 |
| 3 | DIO 3 | C | DIO 7 | | 3 | /SRQ IN | C | PA0 |
| 4 | DIO 4 | D | DIO 8 | | 4 | /EOI | D | |1 |
| 5 | EOI | E | REN | | 5 | DIAG | E | |2 |
| 6 | DAV | F | GND | | 6 | #2CASSREAD | F | |3 |
| 7 | NRFD | H | | | | 7 | CASSWRITE | H | |4 |
| 8 | NDAC | K | | | | 8 | #1CASSREAD | K | |5 |
| 9 | IFC | K | | | | 9 | VERT DRIVE | K | |6 |
| 10 | SRQ | L | | | | 10 | HORZ DRIVE | L | V7 |
| 11 | ATN | M | V | | 11 | GRAPHIC | M | CB2 |
| 12 | CHASSIS GND | N | GND | | 12 | GND | N | GND |
+-----+-------------+-----+--------+ +-----+-------------+-----+--------+
[ All IEEE signals are active low ]
1 2 3 4 5 6 7 8 9 10 11 12
+--o--o--o--o--o--o--o--o--o--o--o--o--+
| | J1 / J2 [PCB edge connector]
+--o--o--o--o--o--o--o--o--o--o--o--o--+
A B C D E F H J K L M N
1 2 3 4 5 6 7 8 9 10 11 12
+------------------------------------+
| o o o o o o o o o o o o |
| | J12 [upright pins on PCB]
| o o o o o o o o o o o o |
+------------------------------------+
A B C D E F H J K L M N
CASSETTE 1 CASSETTE 2
========== ==========
Arrangement of pins plug J3 Arrangement of pins plug J6
+-----+-----+----------------------+ +-----+-----+----------------------+
| PIN | PIN | SIGNAL | | PIN | PIN | SIGNAL |
+-----+-----+----------------------+ +-----+-----+----------------------+
| 1 | A | GND | | 1 | A | GND |
| 2 | B | +5V | | 2 | B | +5V |
| 3 | C | CASS MOTOR | | 3 | C | CASS MOTOR |
| 4 | D | CASS READ #1| | 4 | D | CASS READ #2|
| 5 | E | CASS WRITE | | 5 | E | CASS WRITE |
| 6 | F | CASS SWITCH #1| | 6 | F | CASS SWITCH #2|
+-----+-----+----------------------+ +-----+-----+----------------------+
1 2 3 4 5 6
+--o--o--o--o--o--o--+
| | J3 / J6 [card edge connector]
+--o--o--o--o--o--o--+
A B C D E F
- 13 -
MEMORY - EXPANSION KEYBOARD
================== ========
Arrangement of pins plug J4 Arrangement of pins plug J5
+-----+-----------+-----+--------+ +-----+--------+
| PIN | SIGNAL | PIN | SIGNAL | J4 | PIN | SIGNAL | J5
+-----+-----------+-----+--------+ +-----+--------+ +---+
| 1 | GND | 26 | GND | 25 o o 50 | A | KIN 0 | | o | A
| 2 | BD0 | 27 | | | o o | B | | 1 | | o | B
| 3 | 1 | 28 | | | o o | C | | 2 | | o | C
| 4 | 2 | 29 | | | o o | D | | 3 | | o | D
| 5 | 3 | 30 | | | o o | E | | 4 | | o | E
| 6 | 4 | 31 | | | o o | F | | 5 | | o | F
| 7 | 5 | 32 | | | o o | H | | 6 | | o | H
| 8 | 6 | 33 | | | o o | J | V 7 | | o | J
| 9 | 7 | 34 | | | o o | 1 | DEC 0 | | o | 1
| 10 | N.C. | 35 | | | o o | 2 | | 1 | | o | 2
| 11 | N.C. | 36 | | | o o | 3 | | 2 | | o | 3
| 12 | /RAMSEL 9 | 37 | | | o o | 4 | | 3 | | o | 4
| 13 | /RAMSEL A | 38 | | | o o | 5 | | 4 | | o | 5
| 14 | /RAMON | 39 | | | o o | 6 | | 5 | | o | 6
| 15 | /SELEXP | 40 | | | o o | 7 | | 6 | | o | 7
| 16 | N.C. | 41 | | | o o | 8 | | 7 | | o | 8
| 17 | /CS 9 | 42 | | | o o | 9 | | 8 | | o | 9
| 18 | /CS A | 43 | | | o o | 10 | V 9 | | o | 10
| 19 | /CS E | 44 | | | o o | 11 | KEY | | | 11
| 20 | /NOROM | 45 | | | o o | 12 | GND | | o | 12
| 21 | /PENSTRB | 46 | | | o o +-----+--------+ +---+
| 22 | /RESET | 47 | | | o o
| 23 | READY | 48 | | | o o
| 24 | /NMI | 49 | V | o o
| 25 | GND | 50 | GND | 1 o o 26
+-----+-----------+-----+--------+
VIDEO POWER IN
===== ========
Arrangement of pins plug J7 Arrangement of pins plug J8
+-----+-----------+ +-----+-----------+
| PIN | SIGNAL | | PIN | SIGNAL |
+-----+-----------+ +---+ +-----+-----------+ +---+
| 1 | VIDEO | 1| o | | 1 | AC | 1| o |
| 2 | GND | 2| o | | 2 | GND | 2| o |
| 3 | VERT DRIVE| 3| o | | 3 | AC | 3| o |
| 4 | GND | 4| o | +-----+-----------+ +---+
| 5 | HORZ DRIVE| 5| o |
| 6 | KEY | 6| |
| 7 | GND | 7| o |
+-----+-----------+ +---+
- 14 -
MEMORY - EXPANSION
==================
Arrangement of pins plug J9
+-----+-----------+-----+--------+
| PIN | SIGNAL | PIN | SIGNAL | J9
+-----+-----------+-----+--------+
| 1 | GND | 26 | GND | 25 o o 50
| 2 | BA 0 | 27 | | | o o
| 3 | 1 | 28 | | | o o
| 4 | 2 | 29 | | | o o
| 5 | 3 | 30 | | | o o
| 6 | 4 | 31 | | | o o
| 7 | 5 | 32 | | | o o
| 8 | 6 | 33 | | | o o
| 9 | 7 | 34 | | | o o
| 10 | 8 | 35 | | | o o
| 11 | 9 | 36 | | | o o
| 12 | 10 | 37 | | | o o
| 13 | 11 | 38 | | | o o
| 14 | 12 | 39 | | | o o
| 15 | 13 | 40 | | | o o
| 16 | 14 | 41 | | | o o
| 17 | 15 | 42 | | | o o
| 18 | SYNC | 43 | | | o o
| 19 | /IRQ | 44 | | | o o
| 20 | DIAG | 45 | | | o o
| 21 | PHI2 | 46 | | | o o
| 22 | B R/W | 47 | | | o o
| 23 | /B R/W | 48 | | | o o
| 24 | N.C | 49 | V | o o
| 25 | GND | 50 | GND | 1 o o 26
+-----+-----------+-----+--------+
POWER EXP. AC POWER EXP. DC
============= =============
Arrangement of pins plug J10 Arrangement of pins plug J11
+-----+-----------+ +-----+-----------+
| PIN | SIGNAL | | PIN | SIGNAL |
+-----+-----------+ +---+ +-----+-----------+ +---+
| 1 | AC 8V | 1| o | | 1 | +9V UNREG.| 1| o |
| 2 | AC 8V | 2| o | | 2 | KEY | 2| |
| 3 | GND | 3| o | | 3 | KEY | 3| |
| 4 | KEY | 4| | | 4 | +9V UNREG.| 4| o |
| 5 | GND | 5| o | | 5 | GND | 5| o |
| 6 | AC 8V | 6| o | | 6 | +9V UNREG.| 6| o |
| 7 | AC 8V | 7| o | | 7 | GND | 7| o |
+-----+-----------+ +---+ +-----+-----------+ +---+
- 15 -
KEYBOARD
========
Arrangement of pins plug J13
+-----+--------+
| PIN | SIGNAL |
+-----+--------+
| 1 | KIN 0 |
| 2 | | 1 | 13 1
| 3 | | 2 | +---------------------------+
| 4 | | 3 | | o o o o o o o o o o o o o |
| 5 | | 4 | \ o o o o o o o o o o o o /
| 6 | | 5 | --------------------------
| 7 | | 6 | 25 14
| 8 | V 7 |
| 9 | DEC 0 |
| 10 | | 1 |
| 11 | | 2 |
| 12 | | 3 |
| 13 | | 4 |
| 14 | | 5 |
| 15 | | 6 |
| 16 | | 7 |
| 17 | | 8 |
| 18 | V 9 |
| 19 | KEY |
| 20 | GND |
| 21 | N.C. |
| 22 | N.C. |
| 23 | N.C. |
| 24 | N.C. |
| 25 | N.C. |
+-----+--------+
RESET
=====
Arrangement of pins plug J14
+-----+--------+
| PIN | SIGNAL |
+-----+--------+ +---+
| 1 | RESET | 1| o |
| 2 | GND | 2| o |
+-----+--------+ +---+
- 16 -
B.2 Connectors, modifications as compared with 8032
C B M 8 2 9 6
Changes in arrangement of pins
J 4 Memory expansion
+-----------------------------------+
| Pin Signal |
| old new |
+-----------------+-----------------+
| 12 /SEL 4 | /RAM SEL 9 |
| 13 /SEL 5 | /RAM SEL A |
| 14 /SEL 6 | /RAM ON |
| 15 /SEL 7 | /SEL EXP |
| 16 /SEL 8 | N.C. |
| ... | |
| 19 /SEL B | /CS E |
+-----------------+-----------------+
J 8 Power supply
+-----------------+-----------------+
| 8032 | 8096 |
| | |
| Pin Signal | Pin Signal |
+-----------------+-----------------+
| 1 8V AC | 1 AC |
| 2 +9V UNREG | 2 GND |
| 3 GND | 3 AC |
| 4 8V AC | |
| 5 8V AC | |
| 6 GND | |
| 7 KEY | |
| 8 14V AC | |
| 9 14V AC | |
+-----------------+-----------------+
J 10 Power supply for hardware expansion
+-----------------------------------+
| Pin Signal |
| old new |
+-----------------+-----------------+
| 1 -9V UNREG | AC 1 |
| 2 -9V UNREG | AC 1 |
| 3 KEY | GND |
| 4 +16V UNREG| KEY |
| 5 +16V UNREG| GND |
| 6 GND | AC 2 |
| 7 GND | AC 2 |
+-----------------+-----------------+
- 17 -
[ The following was printed with a dot-matrix printer, with a few bits
pasted over with typewriter text ]
C Software addendum
TABLE OF CONTENTS
64k System Disk...................... 19
Add-on-load.......................... 19
BASIC 2.0............................ 20
BASIC 4.0/40......................... 20
BASIC 4.0/80......................... 21
Add-on-mon........................... 21
Expanded BASIC....................... 24
LIST OF ILLUSTRATIONS
f i g u r e
C-1 Modifications to BASIC 2.0........... 20
C-2 Modifications to BASIC 4.0/40........ 21
- 18 -
64k SYSTEM DISK
By using the 64k Expansion Memory Bank[*1] you have given your
system a soft load capability and also expanded program work
space. We have provided a disk with several programs to
demonstrate these functions.
[*1: Pasted over; it probably read "card" first]
ADD-ON-LOAD
ADD-ON-LOAD.SRC
ADD-ON-MON
ADD-ON-MON.SRC
BASIC2.0
BASIC4.0/40
BASIC4.0/80
EXPANDED-BASIC
EXP-BASIC.SRC
EXPANDED-DEMO
STTEST
TEST1
TEST2
TEST3
TEST4
[The source to EXP-BASIC.SRC also contains the listings of EXPANDED-DEMO,
STTEST and TEST1-TEST4. The BASIC* files are basically new ROM versions
you could load into the expanded RAM with the ADD-ON-LOADER.]
For your convenience we have recorded these programs in 8050
format on one diskette surface and in 4040 format on the flip
side. Use the corresponding side for your system and make a
back-up copy before use.
A D D - O N - L O A D
This program is a special loader which loads one of three
special versions of BASIC, which we have provided on the
disk, and jumps to the proper entry to execute them. These
versions of BASIC reprogram the CRT controller of your 8032
to become a 40 column display. With this environment, all
old 40-column programs in BASIC 2.0 and 4.0 will run on your
8032.
To load and execute a version of BASIC, type the following
sequence of commands:
DLOAD"ADD-ON-LOAD" <return>
RUN <return>
Your CRT should display the following message:
- 19 -
64K ADD-ON-LOADER 2-12-81
SYSTEM NAME?
The cursor will be blinking for you to enter one of the
following system names followed by <return>
BASIC2.0
BASIC4.0/40
BASIC4.0/80
In a few moments your 8032 will print the logon message from
the program you selected.
B A S I C 2 . 0
This is the 40-column BASIC found in all the 3016 and 3032
business keyboard machines. It was produced by dumping the
ROMs and adding the following patch to re-initialize the CRT
controller:
D71A EA EA [ NOP NOP ]
D745 A2 04 [ LDX #4 ]
D747 BD 5E D7 [ LDA $D75E,X ]
D74A BC 59 D7 [ LDY $D759,X ]
D74D 8C 80 E8 [ STY $E880 ]
D750 8D 81 E8 [ STA $E881 ]
D753 CA [ DEX ]
D754 10 F1 [ BPL $D747 ]
D756 4C DE E1 [ JMP $E1DE ]
D759 01 02 03 07 09
D75E 14 20 28 21 07
FCD5 20 45 D7 [ JSR $D745 ]
f i g u r e C-1
B A S I C 4 . 0 / 4 0
This is the 40-column BASIC found in all the 4016 and 4032
business keyboard machines. It was produced by dumping the
ROMs and adding the following patch to re-initialize the CRT
controller:
[ Actually, I think this ROM version is the "upgrade" ROM for
3008, 3016, 3032 machines without CRTC. ]
- 20 -
FD1B 20 5D FD [ JSR $FD5D ]
FD5D A2 04 [ LDX #4 ]
FD5F BD 76 FD [ LDA $FD76,X ]
FD62 BC 71 FD [ LDY $FD71,X ]
FD65 8C 80 E8 [ STY $E880 ]
FD68 8D 81 E8 [ STA $E881 ]
FD6B CA [ DEX ]
FD6C 10 F1 [ BPL FD5F7 ]
FD6E 4C 00 E0 [ JMP $E000 ]
FD71 01 02 03 07 09
FD76 14 20 28 21 07
f i g u r e C-2
B A S I C 4 . 0 / 4 0
This version of BASIC is that supplied in the 8032 60hz
versions. If you have a 50hz machine you probably do not
need this version anyway because it is already in ROM.
E x p a n s i o n M e m o r y M o n i t o r P r o g r a m
The expansion memory monitor source program is provided on
the diskette supplied with this manual. A listing of the
program is provided as an addition to this manual. To run
the monitor program:
1. Load the program into the lower 32K of RAM by
typing:
dload "add-on-mon" <return>
2. Type:
run <return>
The following paragraphs describe the commands used in the
expansion monitor program. The commands allow the programmer
to examine or alter expansion memory, examine or alter 6502
registers, execute programs, load or save disk files and load
the expansion control register.
- 21 -
:
Format: : Address [list of bytes]
Purpose: Alter bytes in memory.
Remarks: This command is automatically printed onto the CRT
display preceding the address and data after
execution of the display memory (M) command. To
alter memory, use the screen editor to change the
displayed bytes and press the <RETURN> key. The
bytes are altered in the addresses specified by the
expansion control register.
;
Format: ;PC,IRQ,SR,AC,SR,YR,SP [2nd SR should be XR]
Purpose: Loads list into 6502 registers.
Remarks: The list of data following this command is loaded
into the 6502 hardware registers when a G command
is given. This command is automatically printed on
the screen preceding the current list of data when
an R command is executed. The list can be editeed
and re-entered in the same manner as the alter
memory command. See the R command for contents of
the list.
R
Format: R
Purpose: Displays the 6502 registers.
Remarks: This command displays the contents of a list loaded
into the 6502 hardware registers when execution is
transferred from the monitor. A sample display
follows:
R <RETURN>
PC IRQ SR AC XR YR SP
;0400 E262 01 00 FF FF FE
The abbreviations are defined as follows:
PC = program counter
IRQ = interrupt vector
SR = status register
AC = accumulator
XR = X-index register
YR = Y-index register
SP = stack pointer
- 22 -
M
Format: M Address [Address]
Purpose: Displays bytes from memory
Remarks: Bytes are displayed from the addresses specified by
the expansion control register. If one address is
specified, 8 bytes are read and displayed on the
screen, starting at that address. For more than
one adress, a range of bytes is displayed, but
always the next even multiple of 8 bytes from the
first. The STOP key stops the listing.
M 0400 <RETURN>
: 0400 00 00 00 AA AA AA AA AA
M
Format: G [Address]
Purpose: Start execution.
Remarks: If an address is not specified, the monitor
dispatches to the location contained in the PC of
the register display. If an address is specified,
execution dispatches to that address. If a BRK
(00) has been inserted in the user code, execution
will return to the monitor and a register display
given with the message "BREAK". On display, the
registers are loaded with the contents of the
register display.
L
Format: L "name", Device
Purpose: Load memory
Remarks: Device number must be 4 or greater for CBM disks.
The starting load address is implicit in the
program load file. The STOP key will break a
program LOAD.
S
Format: S "name", Device, Address, Address
Purpose: Save memory
Remarks: A file name must be specified in quotation marks
followed by a device number, a starting save
address and an ending save address. The STOP key
will break a memory save.
- 23 -
@
Format: @ [disk command]
Purpose: Displays disk status buffer
Remarks: The command immediately followed by <RETURN> will
read the disk status buffer and print its contents
on the screen. The device is set at 8 and the
command channel is 15.
@ <RETURN>
00,ok,00,00
If a string follows the @, then that string is
transmitted to device 8 channel 15 as a command.
@ INITIALIZE 0
name
Format: name
Purpose: Load and execute file from disk
Remarks: When a command cannot be matched to the list of
known commands, an attempt is successful, the
monitor jumos to execute it. [ some text seems missing
in this sentence]
*
Format: * byte
Purpose: Load expansion memory control register (mapper).
Remarks: Puts the byte value following the command into the
expansion control register. When a byte value is
not specified, a zero is stored. This value
restores the machine to ROM operation.
E X P A N D E D - B A S I C :
This program is a pseud-cache memory system for use with the
8032 and the 64k add-on memory board only. It is loaded into
high memory, ($7800-$7BE0):
DLOAD"EXPANDED-BASIC"
It is activated by
SYS 30720
This routine works nearly the same as the DOS-support program
- 24 -
provided with some Commodore disk systems. It moves the top
of memory for BASIC down to $7800 and resets all the
variables. Its commands are implemented by using an escape
character sequence detected by a tap into the CHRGET routine
in BASIC's zero page.
The EXPANDED-BASIC program is completely protected from
normal BASIC programs--however it is vulnerable to POKE
and machine code programs.
Because the 8032 ROM code is not modified, it is not possible
to add space directly to a BASIC program. The EXPANDED-BASIC
program allows a user to store or "cache" programs and data
in the expansion RAM for ultra high-speed access in
overlaying programs.
The following commands are available:
RECALL
Format: !R,0:"filename",s(u)(p),[device]
Purpose: Cache a file from disk.
Remarks: The file can be USR, SEQ or PRG. The device
number defaults to 8. The ST variable is set in
the same manner as a file OPEN for read.
LOAD
Format: !L,"program name"
Purpose: Move data from add-on to BASIC text area.
Remarks: This command clears the current program and loads
the named program. Will not work from a
program--only direct.
OVERLAY
Format: !O,"program name"
Purpose: Move data from add-on to BASIC text area.
Remarks: This command overlays the current program.
Variables and data are preserved.
[ I think that like with the normal overlaying scheme,
the first-loaded program must be at least as
big as all overlays used ]
- 25 -
EXECUTE
Format: !E,"program name"
Purpose: Move data from add-on to BASIC text area.
Remarks: This command clears the variables and data and
loads in a new program. It is callable by a
program.
QUIT
Format: !Q
Purpose: Turn off the expanded Basic functions.
Remarks: None
The programs and files are placed in the expansion memory in
a contiguous manner. If a wrap-around occurs the data will
not fit in the first 32k bank, it will continue over into the
second bank. There are a maximum of 10 file control blocks
so there is a maximum of 10 files that can be stored.
The expanded-BASIC program maintains the file name, start
location, end location, and data pointer. The system does
not know the difference between file types, so all operations
can be performed on all types of files.
The system has the following restrictions: When a command is
used in program mode it must be preceded by a colon. This is
necessary to insure proper operation within an IF THEN.
[ end of the 8296 addendum ]